Si8410/20/21 (5 kV)
Si8 422/23 ( 2. 5 & 5 k V)
Table 2. Electrical Characteristics
(V DD1 = 3.3 V ±10%, V DD2 = 3.3 V ±10%, T A = –40 to 125 °C)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
VDD Undervoltage Threshold
VDD Negative-Going Lockout
VDDUV+ V DD1 , V DD2 rising
VDD HYS
2.15
45
2.3
75
2.5
95
V
mV
Hysteresis
Positive-Going Input Threshold
Negative-Going Input Threshold
Input Hysteresis
High Level Input Voltage
Low Level Input Voltage
High Level Output Voltage
Low Level Output Voltage
Input Leakage Current
VT+
VT–
V HYS
V IH
V IL
V OH
V OL
I L
All inputs rising
All inputs falling
loh = –4 mA
lol = 4 mA
1.6
1.1
0.40
2.0
V DD1 ,V DD2 – 0.4
0.45
3.1
0.2
1.9
1.4
0.50
0.8
0.4
±10
V
V
V
V
V
V
V
μA
Output Impedance
(Si8410/20) 1
Z O
50
?
DC Supply Current (All inputs 0 V or at supply)
Si8410Ax, Bx
V DD1
All inputs 0 DC
1.0
1.5
V DD2
V DD1
V DD2
All inputs 0 DC
All inputs 1 DC
All inputs 1 DC
1.0
3.0
1.0
1.5
4.5
1.5
mA
Si8420Ax, Bx
V DD1
All inputs 0 DC
1.3
2.0
V DD2
V DD1
V DD2
All inputs 0 DC
All inputs 1 DC
All inputs 1 DC
1.7
5.8
1.7
2.6
8.7
2.6
mA
Si8421Ax, Bx
V DD1
All inputs 0 DC
1.7
2.6
V DD2
V DD1
V DD2
All inputs 0 DC
All inputs 1 DC
All inputs 1 DC
1.7
3.7
3.7
2.6
5.6
5.6
mA
Si8422Ax, Bx
V DD1
All inputs 0 DC
3.7
5.6
V DD2
V DD1
V DD2
All inputs 0 DC
All inputs 1 DC
All inputs 1 DC
3.7
1.7
1.7
5.6
2.6
2.6
mA
Si8423Ax, Bx
V DD1
All inputs 0 DC
5.4
8.1
V DD2
V DD1
V DD2
All inputs 0 DC
All inputs 1 DC
All inputs 1 DC
1.7
1.3
1.7
2.6
2.0
2.6
mA
Notes:
1. The nominal output impedance of an isolator driver channel is approximately 50 ? , ±40%, which is a combination of the
value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads
where transmission line effects will be a factor, output pins should be appropriately terminated with controlled
impedance PCB traces.
2. t PSK(P-P) is the magnitude of the difference in propagation delay times measured between different units operating at
the same supply voltages, load, and ambient temperature.
3. Start-up time is the time period from the application of power to valid data at the output.
8
Rev. 1.3
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